A1 Computer fundamentals – IB Computer Science exam questions with mark scheme

1Core4 marks

Describe the fetch stage of the fetch–decode–execute cycle, referring to the program counter (PC), memory address register (MAR), memory data register (MDR) and instruction register (IR). [4]

The address of the next instruction, held in the PC, is copied to the MAR(1)
The address is sent along the address bus to main memory/RAM (with a read signal on the control bus) and the instruction stored there is returned along the data bus to the MDR (buses need not be named for this mark; allow: the instruction at that address is fetched from memory into the MDR)(1)
The instruction is copied from the MDR to the IR (accept CIR)(1)
The PC is incremented to point to the next instruction (accept at any point in the description)(1)
Answer: PC → MAR; address bus to memory, instruction returned on data bus to MDR; MDR → IR; PC incremented.
Examiner tip: Name the register that holds each item and say what moves where (and on which bus); 'the CPU gets the instruction' earns nothing.

2Core4 marks

(a) Convert the decimal number 45 into an 8-bit binary number. [1]

(b) Convert your answer to part (a) into hexadecimal. [1]

(a) 00101101 (must be 8 bits as the question asks; 101101 alone does not score)(1)
(b) 2D (follow through from an incorrect (a) if grouped into nibbles correctly)(1)
(c) 9 × 16 + 15 (or 9F = 1001 1111 with place values shown, 128+16+8+4+2+1)(1)
(c) = 159(1)
Answer: (a) 00101101 (b) 2D (c) 159
Examiner tip: For binary to hex, split into groups of four bits from the right (0010 1101 = 2D); in hex, F = 15, not 16.

3Standard5 marks

The logic circuit shown has inputs A, B and C and output Q.

(a) State the Boolean expression for Q. [2]

(b) Construct a truth table for the circuit, showing an intermediate column for (A AND NOT B) and the output Q for all input combinations. [3]

A AND (NOT B) correctly formed (allow $A\cdot\overline{B}$, A ∧ ¬B or equivalent notation)(1)
Q = (A AND NOT B) OR C (allow $A\overline{B} + C$, or C OR (A AND NOT B); reject A AND (NOT B OR C))(1)
Truth table has all 8 input combinations (000 to 111), in any consistent order(1)
Intermediate column A AND NOT B correct: 0,0,0,0,1,1,0,0 (for ABC = 000 to 111)(1)
Q column correct: 0,1,0,1,1,1,0,1 (follow through from the student's intermediate column; allow T/F for 1/0)(1)
Answer: Q = (A AND NOT B) OR C; Q = 0,1,0,1,1,1,0,1 for ABC = 000 to 111
Examiner tip: Add an intermediate column for each gate output; it makes errors easy to spot and the Q column can earn follow-through credit.

4Standard3 marks

A research team trains a neural network using a GPU. Explain why the architecture of a GPU makes it well suited to this task. [3]

A GPU has a very large number of (simpler) cores (allow: thousands of cores, compared with the few complex cores of a CPU)(1)
Training involves very many identical/independent calculations (e.g. matrix multiplications on weights) that can be carried out at the same time / in parallel (allow SIMD)(1)
So the calculations are completed much faster than on a processor executing largely sequentially (allow: high memory bandwidth / large dedicated memory keeps the many cores supplied with data)(1)
Answer: Many simple cores carry out the many identical matrix calculations in parallel, so training is much faster.
Examiner tip: Link the hardware feature (many cores) to the task (many parallel calculations); just saying 'GPUs are faster' is not enough.

5Standard3 marks

A bitmap image is 1920 pixels wide and 1080 pixels high. Each pixel is stored using 24 bits (a colour depth of 24 bits). Calculate the uncompressed file size, in megabytes (MB), ignoring metadata. (Use 1 MB = 1 000 000 bytes.) [3]

Number of pixels = 1920 × 1080 = 2 073 600(1)
Size = 2 073 600 × 24 = 49 766 400 bits ÷ 8 = 6 220 800 bytes (allow 2 073 600 × 3 bytes)(1)
= 6.22 MB (accept 6.2 MB or 6.2208 MB; unit required)(1)
Answer: 6.22 MB (6 220 800 bytes)
Examiner tip: Convert bits to bytes (÷8) before converting to MB; the final unit must be stated.

6Standard3 marks

Explain how cache memory reduces the time the CPU spends waiting for data. [3]

Cache is small, very fast memory located on/close to the CPU (allow on the processor chip; L1/L2/L3)(1)
It stores copies of frequently/recently used instructions and data from main memory (allow: data likely to be needed next)(1)
If the CPU finds the data in cache (a cache hit) it avoids the slower access to RAM; only on a cache miss is RAM accessed(1)
Answer: Frequently used data held in fast memory near the CPU gives cache hits, avoiding slower RAM access.
Examiner tip: State 'cache hit' versus going to RAM; students lose marks by only saying cache is 'faster'.

7Standard4 marks

A 3-minute stereo (2-channel) recording is made using a sample rate of 44.1 kHz (44 100 samples per second for each channel) and a sample resolution of 16 bits per sample. Calculate the uncompressed file size in MB (use 1 MB = 1 000 000 bytes). Show your working. [4]

Time = 3 × 60 = 180 s(1)
Bits = 44 100 × 16 × 2 (channels) × 180 (factors in any order)(1)
= 254 016 000 bits = 31 752 000 bytes (÷ 8)(1)
= 31.75 MB (accept 31.8 MB or 31.752 MB; unit required)(1)
Answer: 31.75 MB (31 752 000 bytes)
Examiner tip: Remember to multiply by the number of channels (2 for stereo) and divide by 8.

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